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FPGA Engineer

Sanderson
Posted 9 days ago, valid for 8 days
Location

Glasgow, City of Glasgow G62 6EP, Scotland

Contract type

Full Time

In order to submit this application, a Reed account will be created for you. As such, in addition to applying for this job, you will be signed up to all Reed’s services as part of the process. By submitting this application, you agree to Reed’s Terms and Conditions and acknowledge that your personal data will be transferred to Reed and processed by them in accordance with their Privacy Policy.

Sonic Summary

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  • The position is for an FPGA Engineer located in Derby or Glasgow, offering a daily rate between £450 and £650 based on experience, and is classified as inside IR35.
  • This is an initial 12-month contract with a leading consultancy specializing in innovative systems and technology solutions.
  • Candidates should possess a thorough understanding of FPGA concepts, hardware design, and VHDL design toolsets, along with experience in developing complex FPGA architectures.
  • The role involves tasks such as requirements capture, FPGA synthesis, and troubleshooting designs to meet performance targets.
  • Eligibility for SC Clearance is required, which necessitates being a UK national and residing in the UK for the past five years.

FPGA Engineer

Derby or Glasgow (Onsite)

£450 - £650/day DOE (Inside IR35)

Initial 12 Month Contract

Role details:

We are working with a leading consultancy who deliver innovative systems, engineering and technology solutions to their clients. They have an established capability in the design and verification of FPGAs within nuclear control systems are looking to grow the team in two key locations.

Requirements:

  • A thorough understanding of FPGA concepts and hardware design.
  • Proficiency in VHDL design toolsets and verification suites.
  • Experience of developing complex FPGA architectures and design solutions.
  • Requirements capture and development
  • Conduct FPGA synthesis, place and route, and timing closure to meet performance targets.
  • Developing supporting software to maximise the efficiency of the FPGA design lifecycle, e.g. test scripts.
  • Troubleshoot and debug FPGA designs, identifying and resolving issues in a demanding environment.

Eligibility:

To be considered for the role, you must be eligible for SC Clearance (UK National + Residence in the UK for the past 5 years).

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In order to submit this application, a Reed account will be created for you. As such, in addition to applying for this job, you will be signed up to all Reed’s services as part of the process. By submitting this application, you agree to Reed’s Terms and Conditions and acknowledge that your personal data will be transferred to Reed and processed by them in accordance with their Privacy Policy.