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Firmware Engineer
+ 12 month contract
+ 60-75 per hour
+ Portsmouth based
Key Skills:
Understanding of DSP
VHDL Encoding to a high standard in a Linux environment
Linux experience.
Verilog / SystemVerilo
Xilinx Vivado experience, particularly use of block diagrams and non-project mode
You will join our Modems and Software Defined Radio group and report to the Engineering Manager of the project, delivering a new product to the UK MOD.
Mandatory Skills:
- Understanding of DSP
- VHDL Encoding to a high standard in a Linux environment
- Xilinx Vivado experience, particularly use of block diagrams and non-project mode
- tcl scripts for configuring and connecting IP and building projects in the Vivado environment
- Verilog / SystemVerilog
- Git for version control
- Atlassian toolset (e.g. Jira, Confluence, BitBucket)
- Agile or Scrum working environment
Beneficial Skills:
- Familiarity with Zynq Ultrascale RFSoCs e.g. use of AXI busses, associated IP
- Makefile, Linux shell, Jenkins Control scripts
- System and software modelling tools such as Enterprise Architect (SysML / UML)
- Python for test purposes
- SDR (Software Defined Radio)
If you'd like to discuss this role in more detail, please send your updated CV to (url removed) and I will get in touch.
