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The company is seeking a talented Principal Verification Engineer to join its dynamic team. The successful candidate will be responsible for leading and participating in the verification of complex hardware designs. This role requires a deep understanding of verification methodologies and strong expertise in UVM.
Responsibilities
- Architects and defines verification strategy for complex hardware designs
- Designs, develops, and enhances the verification environment using UVM methodology
- Drives metric-driven verification processes to ensure high-quality and reliable designs
- Mentors and provides technical guidance to junior verification engineers
- Collaborates with cross-functional teams to ensure successful verification and validation of designs
- Contributes to the continuous improvement of the verification process and methodologies
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
- Extensive experience in verification of complex hardware designs
- Proficiency in UVM and other advanced verification methodologies
- Strong understanding of verification architecture and metric-driven verification
- Excellent problem-solving and debugging skills
- Strong communication and collaboration skills
- Leadership experience is a plus
- Develops and maintains robust, reusable verification components
- Leads and participates in verification planning and strategy meetings
- Collaborates with design and architecture teams to understand design specifications
- Analyses and debugs failures in the verification environment
- Mentors and guides junior verification engineers on best practices and methodologies
- Stays updated with the latest industry trends and advancements in verification methodologies
