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Contract FPGA Design Engineer - Artix

Redline Group Ltd
Posted 8 hours ago, valid for 15 days
Location

Norwich, Norfolk NR9 3AA, England

Salary

£42,000 - £50,400 per annum

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Contract type

Full Time

In order to submit this application, a Reed account will be created for you. As such, in addition to applying for this job, you will be signed up to all Reed’s services as part of the process. By submitting this application, you agree to Reed’s Terms and Conditions and acknowledge that your personal data will be transferred to Reed and processed by them in accordance with their Privacy Policy.

Sonic Summary

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  • The Redline Group is seeking a Contract FPGA Design Engineer - Artix for a mission-critical project, offering remote or hybrid work options.
  • The position requires experience with Xilinx/AMD FPGAs, specifically the Artix Ultrascale+ family, along with Verilog and UDP Offload Engine expertise.
  • Candidates should also have an appreciation for embedded C, particularly for softcore CPUs, and the project has a hard deadline of April 2025.
  • This role has an indicative OUTSIDE IR35 determination, allowing candidates to operate through their own PSC.
  • Salary details were not specified in the job description, but relevant experience is required for applicants.

The Redline Group have an exciting opportunity for a Contract FPGA Design Engineer - Artix to join a new mission critical project, working potentially on a remote or hybrid basis with our Norfolk-based customer.

This role has an indicative OUTSIDE IR35 determination therefore we can accept candidates who would like to operate through their own PSC.

Specialising in precision instrumentation, our Norfolk based customer are one of the few pioneers of this technology globally. Working alongside a small design team, you will be developing a new Artix Ultrascale+ FPGA to support faster processing speeds via 10gb optical ethernet connectivity and UDP Offload Engine.

Key Skills Required - Contract FPGA Design Engineer - Artix

  • Experience of working with Xilinx/AMD FPGAs, in particular the Artix Ultrascale+ family
  • Experience with Verilog
  • Experience with UDP Offload Engine
  • Experience/appreciation of embedded C, particularly for softcore CPUs

This project has a hard deadline of April 2025 - so the sooner you are available the better!

For more information or to apply for the Contract FPGA Design Engineer - Artix opportunity based in Norfolk, please contact Jack Kelly - / / quoting reference JWK1045

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In order to submit this application, a Reed account will be created for you. As such, in addition to applying for this job, you will be signed up to all Reed’s services as part of the process. By submitting this application, you agree to Reed’s Terms and Conditions and acknowledge that your personal data will be transferred to Reed and processed by them in accordance with their Privacy Policy.