Principal / Senior Principal Microelectronic Layout Engineer

At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. The Northrop Grumman Microelectronics Center (NGMC) of Northrop Grumman Mission Systems has an opening for a Microelectronics Layout Engineer to join our team of qualified, diverse individuals at our Space Park Foundry (SPF) location in Redondo Beach, CA. SPF is where we design, manufacture, and test semiconductor products for internal and commercial production customers as well as emerging technology programs. The SPF semiconductor foundry has unique capabilities supporting a range of production microelectronics technologies (Gallium Arsenide, Indium Phosphide, and Gallium Nitride). SPF provides leading edge technology development in semiconductor materials, processes, devices, and 3D heterogeneous integration (3DHI). SPF’s discriminating technological capabilities enable many of Northrop Grumman’s ground, avionic, and space systems. The selected candidate will support the research and development of advanced microelectronics products for the Northrop Grumman Microelectronics Center. Candidate will be primarily responsible for lithography mask layout using computer aided design (CAD) with Cadence Virtuoso. Other responsibilities will include assisting in design and development of circuits used in a variety of semiconductor devices and utilizing a variety of advanced integration schemes. The candidate should be comfortable with computer programming and task automation. The selected candidate should thrive in a fast-paced work environment with high expectations, significantly diverse assignments, collaborative/team settings across all levels. Candidate should be proactive in learning and problem solving as part of a team, collaborating closely with product engineers, process engineers, circuit designers, and test engineers. This requisition may be filled as a Principal Microelectronics Layout Engineer or Senior Principal Microelectronics Layout Engineer. Basic Qualifications for Principal Microelectronics Layout Engineer: Bachelor’s degree in Electrical Engineering or any related STEM degree with 5 years of semiconductor foundry/design experience (Masters w/ 3 years exp or PhD w/ 0 years exp) Experience with Computer Aided Design (CAD) for microelectronics layout Experience with Cadence Skill computer programming US citizenship required Basic Qualifications for Senior Principal Microelectronics Layout Engineer: Bachelor’s degree in Electrical Engineering or any related STEM degree with 8 years of semiconductor foundry/design experience (Masters w/ 6 years exp or PhD w/ 3 years exp) Experience with Computer Aided Design (CAD) for microelectronics layout Experience with Cadence Skill computer programming US citizenship required Preferred Qualifications for Senior Principal Microelectronics Layout Engineer: Experience with the software AWR and/or ADS for creation of Process Design Kits Experience with semiconductor fabrication processes, preferably III-V semiconductors Excellent communication, interpersonal skills, and the ability to interface with all levels of employees and management Ability to obtain and maintain a security clearance.